1. Technical Field
The invention relates generally to electronic current sources and devices and methods that use such sources.
2. Discussion of Related Art
CMOS technology enables the production of digital-to-analog converters (DACs) with 14 bits of resolution. Implementations of the DACs have used the current-steering arrays. In such an array, the maximum resolution is limited by mismatches between the output currents of different current sources of the array. To achieve high resolution, a current-steering array may be fabricated in a self-calibrating form. Self-calibrating current-steering arrays often need less layout area on an integrated circuit than other types of high-resolution current-steering arrays.
FIG. 1 illustrates a portion of a differential current-steering array 10 that is self-calibrating. The differential current-steering array 10 includes an array of (N+1) fixed current sources 120, 121, . . . , 12N and an array of (N+1) three-way switches 160, . . . 16N, e.g., transistor-type switches. Each switch 161, . . . , 16N is in correspondence with one of the fixed current sources 121, . . . , 12N of the current-steering array 10. Each switch 16j connects the corresponding current source 12j to a plus output port 18+, a minus output port 18−, or to a reference current source 14.
During operation, the three-way switches 160, . . . , 16N connect N of the N+1 fixed current sources 120, . . . , 12N to the output ports 18−, 18+ such that individual ones of the N current sources 120, . . . , 12N only connect to one output ports 18−, 18+. Then, if the individual current sources 120, . . . , 12N are matched to produce equal output currents, the difference of the currents from the output port 18− and the output port 18+ is in the set {NIREF, (N−1)IREF, . . . , −NIREF}. Thus, the differential current-steering array 10 is a variable current source with equally spaced differential current outputs as long as the current sources 120, . . . , 12N are calibrated to produce equal currents.
In current-steering array 10, the individual three-way switches 160, . . . , 16N are transistor switching circuits well-known to those of skill in the art. The transistor switching circuits can be controlled by digital gate voltages so that the differential current-steering array 10 functions as a DAC.
During operation, one three-way switch 16j of the array also connects one current source 12j to the reference current source 14 so that its output current may be calibrated to the fixed value IREF. In particular, the (N+1) current sources 120, . . . , 12N are sequentially connected to the reference current source 14 so that their output currents can be calibrated to IREF during operation.
The extra current source 120 enables the performance of calibrations of the individual current sources 121, . . . , 12N during operation of the current-steering array 10. During the calibration of a current source 12j with j being in {1, . . . , N}, three-way switches 160 and 16j are set to substitute extra current source 120 for the current source 12j in the current steering array 10. This substitution connects the extra current source 120 to one of the output ports 18−, 18+ to which the current source 12j previously connected. During the substitution, the three-way switch 16j connects the current source 12j to the reference current source for calibration. For the above reasons, calibrations of the current sources 120, . . . , 12N can be performed as background processes without stopping operation of the current-steering array 10.
FIG. 2 is a circuit diagram for exemplary current source 12j of the current-steering array 10 as shown in FIG. 1. The current source 12j includes a fine internal current source that includes capacitor C and field-effect transistor T1, a coarse internal current source that includes field-effect transistor T2 and fixed voltage source Vb, and a switch S0. The fine and coarse internal current sources may, e.g., produce about 5% and 95%, respectively, of the total output current of the current source 12j. The adjustability of the fine internal current source enables calibration of the current source 12j.
During normal operation, the switch S0 is open, and the three-way switch 16j connects the current source 12j to one of the output ports 18+, 18−. Then, the two internal current sources produce the combined output current of the current source 12j. During normal operation, the charge on the capacitor C fixes the gate voltage on the transistor T1 and its associated drain current.
During calibration operation, the charge on the capacitor C is reset to so that the drain currents of both transistors T1 and T2 sum to about IREF. To perform a calibration, the switch S0 is closed, and the three-way switch 16j is set to connect the current source 12j to reference current source 14. Then, the drain current flow through the transistor T1 adjusts so that the sum of the currents through both transistors T1, T2 becomes equal to IREF. During this operation, a current flow also adjusts the charge on the capacitor C so that the capacitor C provides an appropriate drain voltage for the drain current in the transistor T1. Thus, such a calibration resets the current source 12j to produce an output current of IREF.
Referring to FIGS. 1 and 2, the differential current-steering array 10 has several properties that can cause current imbalances between the current sources 120, . . . , 12N. First, opening the three-way switches 160, . . . , 16N to output ports 18+, 18− can transfer charges to the gates of the internal transistors T1 in the corresponding current sources 120, . . . , 12N thereby changing the setting for their output currents. Second, in the current sources 120, . . . , 12N, leakage through the gates of the internal transistors T1 can change the charges on the capacitors C thereby changing the output currents of the current sources 120, . . . , 12N. Third, switching individual current sources 120, . . . , 12N into and out of connection with the output ports 18+, 18− to do calibrations will typically produce calibration frequency spurs in the output currents at the output ports 18+, 18−.